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ISCAS
2006
IEEE
117views Hardware» more  ISCAS 2006»
15 years 3 months ago
Embedded image coding using quincunx directional filter bank
— An image coding system based on combination of a multiresolution directional decomposition and a morphological dilation algorithm is proposed in this paper. The multiscale fil...
Yilong Liu, Truong T. Nguyen, Soontorn Oraintara
ISCA
2005
IEEE
87views Hardware» more  ISCA 2005»
15 years 3 months ago
A Robust Main-Memory Compression Scheme
Lossless data compression techniques can potentially free up more than 50% of the memory resources. However, previously proposed schemes suffer from high access costs. The propose...
Magnus Ekman, Per Stenström
ISCA
2005
IEEE
115views Hardware» more  ISCA 2005»
15 years 3 months ago
The V-Way Cache: Demand Based Associativity via Global Replacement
As processor speeds increase and memory latency becomes more critical, intelligent design and management of secondary caches becomes increasingly important. The efficiency of curr...
Moinuddin K. Qureshi, David Thompson, Yale N. Patt
ISCA
2002
IEEE
80views Hardware» more  ISCA 2002»
15 years 2 months ago
A Large, Fast Instruction Window for Tolerating Cache Misses
Instruction window size is an important design parameter for many modern processors. Large instruction windows offer the potential advantage of exposing large amounts of instructi...
Alvin R. Lebeck, Tong Li, Eric Rotenberg, Jinson K...
ISCA
2002
IEEE
108views Hardware» more  ISCA 2002»
15 years 2 months ago
A Scalable Instruction Queue Design Using Dependence Chains
Increasing the number of instruction queue (IQ) entries in a dynamically scheduled processor exposes more instruction-level parallelism, leading to higher performance. However, in...
Steven E. Raasch, Nathan L. Binkert, Steven K. Rei...