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ITC
1997
IEEE
100views Hardware» more  ITC 1997»
15 years 1 months ago
Signal Generation Using Periodic Single-and Multi-Bit Sigma-Delta Modulated Streams
Abstract- This paper describes a new method to generate analog signals with high precision at very low hardware complexity. This method consists in reproducing periodically a recor...
Benoit Dufort, Gordon W. Roberts
ITC
1997
IEEE
107views Hardware» more  ITC 1997»
15 years 1 months ago
Weak Write Test Mode: An SRAM Cell Stability Design for Test Technique
The detection of cell stability and data retention faults in SRAMs has been a time consuming process. In this paper we discuss a new design for test technique called Weak Write Tes...
Anne Meixner, Jash Banik
ITC
1997
IEEE
107views Hardware» more  ITC 1997»
15 years 1 months ago
On-Chip Measurement of the Jitter Transfer Function of Charge-Pump Phase-Locked Loops
- An all-digital technique for the measurement of the jitter transfer function of charge-pump phase-locked loops is introduced. Input jitter may be generated using one of two metho...
Benoît R. Veillette, Gordon W. Roberts
ITC
1997
IEEE
123views Hardware» more  ITC 1997»
15 years 1 months ago
Modifying User-Defined Logic for Test Access to Embedded Cores
Testing embedded cores is a challenge because access to core I/Os is limited. The user-defined logic (ZJDL) surrounding the core may restrict the set of test vectors that can be a...
Bahram Pouya, Nur A. Touba
ITC
1997
IEEE
129views Hardware» more  ITC 1997»
15 years 1 months ago
On Using Machine Learning for Logic BIST
This paper presents a new approach for designing test sequences to be generated on–chip. The proposed technique is based on machine learning, and provides a way to generate effi...
Christophe Fagot, Patrick Girard, Christian Landra...