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ITC
2000
IEEE
15 years 1 months ago
2000
IEEE
We describe logic synthesis techniques for designing diverse implementations of combinational logic circuits in order to maximize the data integrity of diverse duplex systems in t...
ITC
2000
IEEE
15 years 1 months ago
2000
IEEE
This paper studies some manufacturing test data collected for an experimental digital IC. Test results for a large variety of single-stuck fault based test sets are shown and comp...
ITC
2000
IEEE
15 years 1 months ago
2000
IEEE
This paper describes the results of testing 50 single inline memory modules (SIMMs), each containing 16 16Mbit DRAM chips (DUTs); 39 SIMMs failed, and of the 800 DUTs, 116failed. ...
ITC
2000
IEEE
15 years 1 months ago
2000
IEEE
An area efficient and robust integrated test core for mixed-signal circuits is described. The core consists of a completely digital implementation, except for a simple reconstructi...
ITC
2000
IEEE
15 years 1 months ago
2000
IEEE
We present the application of a deterministic logic BIST scheme on state-of-the-art industrial circuits. Experimental results show that complete fault coverage can be achieved for...