101 search results - page 14 / 21 » micro 2000 |
MICRO
2000
IEEE
15 years 2 months ago
2000
IEEE
An effective method for reducing the effect of load latency in modern processors is data prefetching. One form of data prefetching, stream buffers, has been shown to be particular...
MICRO
2000
IEEE
15 years 1 months ago
2000
IEEE
While technology is delivering increasingly sophisticated and powerful chip designs, it is also imposing alarmingly high energy requirements on the chips. One way to address this ...
MICRO
2000
IEEE
14 years 9 months ago
2000
IEEE
This paper demonstrates how an Instruction Path Coprocessor (I-COP) can be efficiently implemented using the PipeRench reconfigurable architecture. An I-COP is a programmable on-c...
MICRO
2000
IEEE
14 years 9 months ago
2000
IEEE
The popularity of the Internet and the emergence of broadband access networks is fueling the development of communications processors -- devices that integrate processing, network...
71
Voted
MICRO
2006
IEEE
15 years 3 months ago
2006
IEEE
Secure processor architecture enables tamper-proof protection on software that addresses many difficult security problems such as reverse-engineering prevention, trusted computing...