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MICRO
2006
IEEE
127views Hardware» more  MICRO 2006»
15 years 3 months ago
A Predictive Performance Model for Superscalar Processors
Designing and optimizing high performance microprocessors is an increasingly difficult task due to the size and complexity of the processor design space, high cost of detailed si...
P. J. Joseph, Kapil Vaswani, Matthew J. Thazhuthav...
MICRO
2006
IEEE
124views Hardware» more  MICRO 2006»
15 years 3 months ago
LIFT: A Low-Overhead Practical Information Flow Tracking System for Detecting Security Attacks
Computer security is severely threatened by software vulnerabilities. Prior work shows that information flow tracking (also referred to as taint analysis) is a promising techniqu...
Feng Qin, Cheng Wang, Zhenmin Li, Ho-Seop Kim, Yua...
MICRO
2005
IEEE
133views Hardware» more  MICRO 2005»
15 years 3 months ago
Wish Branches: Combining Conditional Branching and Predication for Adaptive Predicated Execution
Predicated execution has been used to reduce the number of branch mispredictions by eliminating hard-to-predict branches. However, the additional instruction overhead and addition...
Hyesoon Kim, Onur Mutlu, Jared Stark, Yale N. Patt
MICRO
2005
IEEE
113views Hardware» more  MICRO 2005»
15 years 3 months ago
Thermal Management of On-Chip Caches Through Power Density Minimization
Various architectural power reduction techniques have been proposed for on-chip caches in the last decade. In this paper, we first show that these power reduction techniques can b...
Ja Chun Ku, Serkan Ozdemir, Gokhan Memik, Yehea I....
MICRO
2005
IEEE
110views Hardware» more  MICRO 2005»
15 years 3 months ago
Scalable Store-Load Forwarding via Store Queue Index Prediction
Conventional processors use a fully-associative store queue (SQ) to implement store-load forwarding. Associative search latency does not scale well to capacities and bandwidths re...
Tingting Sha, Milo M. K. Martin, Amir Roth