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IOLTS
2000
IEEE
115views Hardware» more  IOLTS 2000»
15 years 2 months ago
Micro-Checkpointing: Checkpointing for Multithreaded Applications
In this paper, we introduce an efficient technique for checkpointing multithreaded applications. Our approach makes use of processes constructed around the ARMOR (Adaptive Reconfi...
Keith Whisnant, Zbigniew Kalbarczyk, Ravishankar K...
ASAP
2000
IEEE
90views Hardware» more  ASAP 2000»
15 years 2 months ago
Subword Permutation Instructions for Two-Dimensional Multimedia Processing in MicroSIMD Architectures
MicroSIMD architectures incorporating subword parallelism are very efficient for application-specific media processors as well as for fast multimedia information processing in gen...
Ruby B. Lee
NAR
2008
127views more  NAR 2008»
14 years 9 months ago
miRBase: tools for microRNA genomics
miRBase is the central online repository for microRNA (miRNA) nomenclature, sequence data, annotation and target prediction. The current release (10.0) contains 5071 miRNA loci fr...
Sam Griffiths-Jones, Harpreet Kaur Saini, Stijn va...
APCSAC
2000
IEEE
15 years 2 months ago
Micro-Threading: A New Approach to Future RISC
This paper briefly reviews the current research into RISC microprocessor architecture, which now seems to be so complex as to make the acronym somewhat of an oxymoron. In response...
Chris R. Jesshope, Bing Luo
IPPS
2000
IEEE
15 years 2 months ago
Micro-Architectures of High Performance, Multi-User System Area Network Interface Cards
This paper examines two Network Interface Card microarchitectures that support low latency, high bandwidth userlevel message passing in multi-user environments. The two are at dif...
Boon Seong Ang, Derek Chiou, Larry Rudolph, Arvind