This paper explores the application of wearable computer systems to threat response, exemplified by the Multi-functional Micro-controllable Interface Module (MMIM)/Digital Militar...
Noa M. Rensing, Evan Weststrate, Paul M. Zavracky,...
This paper presents the development of instruction analysis/scheduling CAD techniques to measure the distribution of functional unit usage and the micro operation level parallelis...
Pre-execution attacks cache misses for which conventional address-prediction driven prefetching is ineffective. In pre-execution, copies of cache miss computations are isolated fr...
Register integration (or just integration) is a register renaming discipline that implements instruction reuse via physical register sharing. Initially developed to perform squash...
On-chip caches represent a sizeable fraction of the total power consumption of microprocessors. Although large caches can significantly improve performance, they have the potentia...