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MICRO
2005
IEEE
114views Hardware» more  MICRO 2005»
15 years 3 months ago
Address-Indexed Memory Disambiguation and Store-to-Load Forwarding
This paper describes a scalable, low-complexity alternative to the conventional load/store queue (LSQ) for superscalar processors that execute load and store instructions speculat...
Sam S. Stone, Kevin M. Woley, Matthew I. Frank
MICRO
2005
IEEE
144views Hardware» more  MICRO 2005»
15 years 3 months ago
A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance
Dynamic voltage and frequency scaling (DVFS) is an effective technique for controlling microprocessor energy and performance. Existing DVFS techniques are primarily based on hardw...
Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vi...
ISORC
2005
IEEE
15 years 3 months ago
Heterogeneous Adaptive Component-Based Applications with Adaptive.Net
Adaptation to changing environmental conditions is a major challenge for most distributed applications. The service-oriented programming paradigm leads to an increasing number of ...
Andreas Rasche, Marco Puhlmann, Andreas Polze
ICFP
2005
ACM
15 years 9 months ago
Dynamic optimization for functional reactive programming using generalized algebraic data types
A limited form of dependent types, called Generalized Algebraic Data Types (GADTs), has recently been added to the list of Haskell extensions supported by the Glasgow Haskell Comp...
Henrik Nilsson
MICRO
2009
IEEE
315views Hardware» more  MICRO 2009»
15 years 4 months ago
Control flow obfuscation with information flow tracking
Recent micro-architectural research has proposed various schemes to enhance processors with additional tags to track various properties of a program. Such a technique, which is us...
Haibo Chen, Liwei Yuan, Xi Wu, Binyu Zang, Bo Huan...