133 search results - page 15 / 27 » micro 2006 |
MICRO
2006
IEEE
15 years 3 months ago
2006
IEEE
This paper presents NoSQ (short for No Store Queue), a microarchitecture that performs store-load communication without a store queue and without executing stores in the outof-ord...
MICRO
2006
IEEE
15 years 3 months ago
2006
IEEE
Secure processor architecture enables tamper-proof protection on software that addresses many difficult security problems such as reverse-engineering prevention, trusted computing...
MICRO
2006
IEEE
15 years 3 months ago
2006
IEEE
Growing on-chip wire delays will cause many future microarchitectures to be distributed, in which hardware resources within a single processor become nodes on one or more switched...
MICRO
2006
IEEE
15 years 3 months ago
2006
IEEE
One of the main challenges of modern processor design is the implementation of a scalable and efficient mechanism to detect memory access order violations as a result of out-of-o...
MICRO
2006
IEEE
14 years 9 months ago
2006
IEEE
Predication facilitates high-bandwidth fetch and large static scheduling regions, but has typically been too complex to implement comprehensively in out-of-order microarchitecture...