Abstract— The mixed-signal processor performs digital vectormatrix multiplication using internally analog fine-grain parallel computing. The three-transistor CID/DRAM unit cell ...
This paper explores the power implications of replacing global chip wires with an on-chip network. We optimize network links by varying repeater spacing, link pipelining, and volt...
Abstract. A computer-aided diagnosis (CAD) system to detect smallsize (from 2 mm to around 10 mm) pulmonary nodules in helical CT scans is developed. This system uses different sc...
Xiangwei Zhang, Geoffrey McLennan, Eric A. Hoffman...
— A phase-locked loop (PLL) with two different delay feedback paths is presented. It provides a new approach to minimize the dead zone, jitter accumulation, long settling time an...
A fully programmable radio baseband processor architecture is presented. The architecture is based on a DSP processor core and a number flexible accelerators, connected via a con...