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ASPDAC
2004
ACM
87views Hardware» more  ASPDAC 2004»
15 years 2 months ago
ShatterPB: symmetry-breaking for pseudo-Boolean formulas
Many important tasks in circuit design and verification can be performed in practice via reductions to Boolean Satisfiability (SAT), making SAT a fundamental EDA problem. However ...
Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Kare...
AAAI
2004
14 years 10 months ago
Study of Lower Bound Functions for MAX-2-SAT
Recently, several lower bound functions are proposed for solving the MAX-2-SAT problem optimally in a branch-and-bound algorithm. These lower bounds improve significantly the perf...
Haiou Shen, Hantao Zhang
AI
2005
Springer
14 years 9 months ago
: Compiling problem specifications into SAT
We present a compiler that translates a problem specification into a propositional satisfiability test (SAT). Problems are specified in a logic-based language, called NP-SPEC, whi...
Marco Cadoli, Andrea Schaerf
FPL
2004
Springer
95views Hardware» more  FPL 2004»
15 years 2 months ago
Solving SAT with a Context-Switching Virtual Clause Pipeline and an FPGA Embedded Processor
Abstract. This paper proposes an architecture that combines a contextswitching virtual configware/software SAT solver with an embedded processor to promote a tighter coupling betwe...
C. J. Tavares, C. Bungardean, G. M. Matos, Jos&eac...
DATE
2004
IEEE
116views Hardware» more  DATE 2004»
15 years 1 months ago
A Novel SAT All-Solutions Solver for Efficient Preimage Computation
In this paper, we present a novel all-solutions preimage SAT solver, SOLALL, with the following features: (1) a new success-driven learning algorithm employing smaller cut sets; (...
Bin Li, Michael S. Hsiao, Shuo Sheng