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EWSN
2010
Springer
15 years 5 months ago
Wiselib: A Generic Algorithm Library for Heterogeneous Sensor Networks
One unfortunate consequence of the success story of wireless sensor networks (WSNs) in separate research communities is an evergrowing gap between theory and practice. Even though ...
Tobias Baumgartner, Ioannis Chatzigiannakis, S&aac...
113
Voted
DATE
2010
IEEE
113views Hardware» more  DATE 2010»
15 years 5 months ago
PM-COSYN: PE and memory co-synthesis for MPSoCs
—Multi-Processor System-on-Chips (MPSoCs) exploit task-level parallelism to achieve high computation throughput, but concurrent memory accesses from multiple PEs may cause memory...
Yi-Jung Chen, Chia-Lin Yang, Po-Han Wang
DATE
2010
IEEE
161views Hardware» more  DATE 2010»
15 years 5 months ago
Aging-resilient design of pipelined architectures using novel detection and correction circuits
—Time-dependent performance degradation due to transistor aging caused by mechanisms such as Negative Bias Temperature Instability (NBTI) and Hot Carrier Injection (HCI) is one o...
Hamed F. Dadgour, Kaustav Banerjee
94
Voted
GLVLSI
2010
IEEE
212views VLSI» more  GLVLSI 2010»
15 years 5 months ago
An integrated thermal estimation framework for industrial embedded platforms
Next generation industrial embedded platforms require the development of complex power and thermal management solutions. Indeed, an increasingly fine and intrusive thermal contro...
Andrea Acquaviva, Andrea Calimera, Alberto Macii, ...
ISCA
2010
IEEE
205views Hardware» more  ISCA 2010»
15 years 5 months ago
The virtual write queue: coordinating DRAM and last-level cache policies
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
Jeffrey Stuecheli, Dimitris Kaseridis, David Daly,...