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ISCA
2002
IEEE
115views Hardware» more  ISCA 2002»
15 years 2 months ago
ReVive: Cost-Effective Architectural Support for Rollback Recovery in Shared-Memory Multiprocessors
This paper presents ReVive, a novel general-purpose rollback recovery mechanism for shared-memory multiprocessors. ReVive carefully balances the conflicting requirements of avail...
Milos Prvulovic, Josep Torrellas, Zheng Zhang
ISCAS
2002
IEEE
124views Hardware» more  ISCAS 2002»
15 years 2 months ago
Performance optimization of multiple memory architectures for DSP
Multiple memory module architecture offers higher performance by providing potentially doubled memory bandwidth. Two key problems in gaining high performance in this kind of archi...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
84
Voted
ISSS
2002
IEEE
139views Hardware» more  ISSS 2002»
15 years 2 months ago
Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a ...
Erwin A. de Kock
77
Voted
ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
15 years 2 months ago
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
Satoshi Matsushita
MICRO
2002
IEEE
100views Hardware» more  MICRO 2002»
15 years 2 months ago
Microarchitectural exploration with Liberty
To find the best designs, architects must rapidly simulate many design alternatives and have confidence in the results. Unfortunately, the most prevalent simulator construction ...
Manish Vachharajani, Neil Vachharajani, David A. P...