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109
Voted
MICRO
2008
IEEE
159views Hardware» more  MICRO 2008»
15 years 7 months ago
A novel cache architecture with enhanced performance and security
—Caches ideally should have low miss rates and short access times, and should be power efficient at the same time. Such design goals are often contradictory in practice. Recent f...
Zhenghong Wang, Ruby B. Lee
112
Voted
MICRO
2008
IEEE
103views Hardware» more  MICRO 2008»
15 years 7 months ago
Testudo: Heavyweight security analysis via statistical sampling
Heavyweight security analysis systems, such as taint analysis and dynamic type checking, are powerful technologies used to detect security vulnerabilities and software bugs. Tradi...
Joseph L. Greathouse, Ilya Wagner, David A. Ramos,...
MICRO
2008
IEEE
113views Hardware» more  MICRO 2008»
15 years 7 months ago
From SODA to scotch: The evolution of a wireless baseband processor
With the multitude of existing and upcoming wireless standards, it is becoming increasingly difficult for hardware-only baseband processing solutions to adapt to the rapidly chan...
Mark Woh, Yuan Lin, Sangwon Seo, Scott A. Mahlke, ...
127
Voted
NOCS
2008
IEEE
15 years 7 months ago
Debugging Distributed-Shared-Memory Communication at Multiple Granularities in Networks on Chip
We present a methodology to debug a SOC by concentrating on its communication. Our extended communication model includes a) multiple signal groups per interface protocol at each I...
Bart Vermeulen, Kees Goossens, Siddharth Umrani
NOMS
2008
IEEE
175views Communications» more  NOMS 2008»
15 years 7 months ago
Analysis of application performance and its change via representative application signatures
Abstract—Application servers are a core component of a multitier architecture that has become the industry standard for building scalable client-server applications. A client com...
Ningfang Mi, Ludmila Cherkasova, Kivanc M. Ozonat,...