3330 search results - page 516 / 666 » software 2010 |
133
click to vote
CGO
2010
IEEE
15 years 12 months ago
2010
IEEE
For memory constrained embedded systems code size is at least as important as performance. One way of increasing code density is to exploit compact instruction formats, e.g. ARM T...
160
click to vote
CGO
2010
IEEE
15 years 12 months ago
2010
IEEE
Tiling is a widely used loop transformation for exposing/exploiting parallelism and data locality. Effective use of tiling requires selection and tuning of the tile sizes. This is...
138
click to vote
CISIS
2010
IEEE
15 years 12 months ago
2010
IEEE
—Current trends in desktop processor design have been toward many-core solutions with increased parallelism. As the number of supported threads grows in these processors, it may ...
138
click to vote
ISPASS
2010
IEEE
15 years 12 months ago
2010
IEEE
—The ongoing move to chip multiprocessors (CMPs) permits greater sharing of last-level cache by processor cores but this sharing aggravates the cache contention problem, potentia...
144
click to vote
ISPASS
2010
IEEE
15 years 12 months ago
2010
IEEE
Abstract—We generate and provide miniature synthetic benchmark clones for modern workloads to solve two pre-silicon design challenges, namely: 1) huge simulation time (weeks to m...