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TCAD
2002
158views more  TCAD 2002»
14 years 9 months ago
Static power modeling of 32-bit microprocessors
The paper presents a novel strategy aimed at modelling instruction energy consumption of 32-bits microprocessors. Differently from former approaches, the proposed instruction-level...
Carlo Brandolese, Fabio Salice, William Fornaciari...
TCAD
2002
86views more  TCAD 2002»
14 years 9 months ago
Platune: a tuning framework for system-on-a-chip platforms
System-on-a-chip (SOC) platform manufacturers are increasingly adding configurable features that provide power and performance flexibility in order to increase a platform's ap...
Tony Givargis, Frank Vahid
TCAD
2002
85views more  TCAD 2002»
14 years 9 months ago
Architectural energy optimization by bus splitting
This paper proposes split shared-bus architecture to reduce the energy dissipation for global data exchange among a set of interconnected modules. The bus splitting problem for mi...
Cheng-Ta Hsieh, Massoud Pedram
TCAD
2002
128views more  TCAD 2002»
14 years 9 months ago
Preferred direction Steiner trees
Interconnect optimization for VLSI circuits has received wide attention. To model routing surfaces, multiple circuit layers are freabstracted as a single rectilinear plane, ignori...
Mehmet Can Yildiz, Patrick H. Madden
TCAD
2002
93views more  TCAD 2002»
14 years 9 months ago
Hierarchical buffered routing tree generation
Abstract--This paper presents a solution to the problem of performance-driven buffered routing tree generation for VLSI circuits. Using a novel bottom-up construction algorithm and...
Amir H. Salek, Jinan Lou, Massoud Pedram