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ISCA
1997
IEEE
103views Hardware» more  ISCA 1997»
15 years 5 months ago
Designing High Bandwidth On-Chip Caches
In this paper we evaluate the performance of high bandwidth caches that employ multiple ports, multiple cycle hit times, on-chip DRAM, and a line buffer to find the organization t...
Kenneth M. Wilson, Kunle Olukotun
106
Voted
ISWC
1997
IEEE
15 years 5 months ago
Nomadic Radio: A Spatialized Audio Environment for Wearable Computing
This paper describes an on-going research project at the MIT Media Lab, exploring the use of auditory I/O as a primary interaction modality for wearable computing. Nomadic Radio i...
Nitin "Nick" Sawhney, Chris Schmandt
83
Voted
ITC
1997
IEEE
92views Hardware» more  ITC 1997»
15 years 5 months ago
A Novel Functional Test Generation Method for Processors Using Commercial ATPG
As the sizes of general and special purpose processors increase rapidly, generating high quality manufacturing tests for them is becoming a serious problem in industry. This paper...
Raghuram S. Tupuri, Jacob A. Abraham
76
Voted
DAC
1997
ACM
15 years 5 months ago
CLIP: An Optimizing Layout Generator for Two-Dimensional CMOS Cells
We present a novel technique CLIP for optimizing both the height and width of CMOS cell layouts in the two-dimensional (2D) style. CLIP is based on integer-linear programming (ILP...
Avaneendra Gupta, John P. Hayes
DAC
1997
ACM
15 years 5 months ago
An Improved Algorithm for Minimum-Area Retiming
The concept of improving the timing behavior of a circuit by relocating flip-flops is called retiming and was first presented by Leiserson and Saxe. The ASTRA algorithm propose...
Naresh Maheshwari, Sachin S. Sapatnekar