A target structure for implementing fast edge-triggered control units is presented. In many cases, the proposed controller is faster than a one-hot encoded structure as its correc...
Existing concurrency control algorithms do not well conform to various environments, in the performance perspective. Each algorithm has some assumption on the conflict characteris...
By strictly separating reconfigurable logic from their host processor, current custom computing systems suffer from a significant communication bottleneck. In this paper we descri...
Scott Hauck, Thomas W. Fry, Matthew M. Hosler, Jef...
In a VHDL-based design flow for applicationspecific integrated circuits, VITAL provides a uniform methodology for developing ASIC libraries for signoff simulation. The VITAL Sta...
Josef Fleischmann, Rolf Schlagenhaft, Martin Pelle...
This paper deals with the modelling and evaluation of mission-phased systems devoted to space applications. We propose a two level hierarchical method that allows to model such sy...