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ISCA
1999
IEEE
96views Hardware» more  ISCA 1999»
15 years 4 months ago
PipeRench: A Coprocessor for Streaming multimedia Acceleration
Future computing workloads will emphasize an architecture's ability to perform relatively simple calculations on massive quantities of mixed-width data. This paper describes ...
Seth Copen Goldstein, Herman Schmit, Matthew Moe, ...
107
Voted
ISCA
1999
IEEE
88views Hardware» more  ISCA 1999»
15 years 4 months ago
A Scalable Front-End Architecture for Fast Instruction Delivery
In the pursuit of instruction-level parallelism, significant demands are placed on a processor's instruction delivery mechanism. Delivering the performance necessary to meet ...
Glenn Reinman, Todd M. Austin, Brad Calder
85
Voted
ISCA
1999
IEEE
87views Hardware» more  ISCA 1999»
15 years 4 months ago
Dynamic Vectorization: A Mechanism for Exploiting Far-Flung ILP in Ordinary Programs
Several ILP limit studies indicate the presence of considerable ILP across dynamically far-apart instructions in program execution. This paper proposes a hardware mechanism, dynam...
Sriram Vajapeyam, P. J. Joseph, Tulika Mitra
ISCAS
1999
IEEE
106views Hardware» more  ISCAS 1999»
15 years 4 months ago
Test pattern generation for width compression in BIST
The main objectives of Built-In Self Test (BIST) are the design of test pattern generator circuits which achieve the highest fault coverage, require the shortest sequence of test ...
Paulo F. Flores, Horácio C. Neto, K. Chakra...
COLLABORATION
1999
Springer
15 years 4 months ago
Shifting the Focus from Control to Communication: the STReams OBjects Environments Model of Communicating Agents
The paper presents the computational model underlying new agent communication languages. The model, called STROBE, has been identified and two prototypical languages inspired by th...
Stefano A. Cerri