A novel approach to testing sequential circuits that uses multi-level decision diagram representations is introduced. The proposed algorithm consists of a combination of scanning ...
In this paper we consider the problem of fast computation of n-ary products, for large n, over arbitrary precision integer or rational number domains. The combination of loop unro...
A method for modeling complex CMOS gates by the reduction of each gate to an effective equivalent inverter is introduced. The conducting and parasitic behavior of parallel and ser...
Alexander Chatzigeorgiou, Spiridon Nikolaidis, Ioa...
The design and development of network infrastructure to support mission-critical operations has become a critical and complicated issue. In this study we explore the use of geneti...
Chao-Hsien Chu, G. Premkumar, Carey Chou, Jianzhon...
Estimating peak power involves optimization of the circuit's switching function. We propose genetic spot expansion and optimization in this paper to estimate tight peak power...