1120 search results - page 95 / 224 » time 1999 |
87
Voted
ASYNC
1999
IEEE
15 years 5 months ago
1999
IEEE
This paper discusses the application of the timing analysis tool ATACS to the high performance, self-resetting and delayed-reset domino circuits being designed at IBM's Austi...
ASPDAC
1999
ACM
15 years 5 months ago
1999
ACM
In this paper, we present a fast and efficient Iterative Improvement Partitioning (IIP) technique for VLSI circuits and hybrid bucket structures on its implementation. Due to thei...
139
Voted
DATE
1999
IEEE
15 years 5 months ago
1999
IEEE
Boolean Satisfiability is a ubiquitous modeling tool in Electronic Design Automation, It finds application in test pattern generation, delay-fault testing, combinational equivalen...
103
click to vote
DSRT
1999
IEEE
15 years 5 months ago
1999
IEEE
This paper describes a variant of the actor model suited to the development of multimedia systems. The actor model centers on non-overkilling concurrency and customizable constrai...
122
click to vote
ICCD
1999
IEEE
15 years 5 months ago
1999
IEEE
This research explores any potential for an on-chip cache compression which can reduce not only cache miss ratio but also miss penalty, if main memory is also managed in compresse...