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ICML
2000
IEEE
16 years 5 months ago
Less is More: Active Learning with Support Vector Machines
We describe a simple active learning heuristic which greatly enhances the generalization behavior of support vector machines (SVMs) on several practical document classification ta...
Greg Schohn, David Cohn
DATE
2000
IEEE
121views Hardware» more  DATE 2000»
15 years 9 months ago
Functional Test Generation for Full Scan Circuits
We study the effectiveness of functional tests for full scan circuits. Functional tests are important for design validation, and they potentially have a high defect coverage indep...
Irith Pomeranz, Sudhakar M. Reddy
GLVLSI
2000
IEEE
110views VLSI» more  GLVLSI 2000»
15 years 9 months ago
A sensitivity based placer for standard cells
We present a new timing driven method for global placement. Our method is based on the observation that similar net length reductions in the different nets that make up a path may...
Bill Halpin, C. Y. Roger Chen, Naresh Sehgal
ICECCS
2000
IEEE
135views Hardware» more  ICECCS 2000»
15 years 9 months ago
Definitions of Equivalence for Transformational Synthesis of Embedded Systems
Design of embedded systems is a complex task that requires design cycles founded upon formal notation, so that the synthesis from specification to implementation can be carried ou...
Luis Alejandro Cortés, Petru Eles, Zebo Pen...
ICPP
2000
IEEE
15 years 9 months ago
Runtime Parallel Incremental Scheduling of DAGs
A runtime parallel incremental DAG scheduling approach is described in this paper. A DAG is expanded incrementally, scheduled, and executed on a parallel machine. A DAG scheduling...
Min-You Wu, Wei Shu, Yong Chen