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ISCA
2000
IEEE
91views Hardware» more  ISCA 2000»
15 years 10 months ago
Performance analysis of the Alpha 21264-based Compaq ES40 system
This paper evaluates performance characteristics of the Compaq ES40 shared memory multiprocessor. The ES40 system contains up to four Alpha 21264 CPU’s together with a high-perf...
Zarka Cvetanovic, Richard E. Kessler
ISQED
2000
IEEE
136views Hardware» more  ISQED 2000»
15 years 10 months ago
A Layout Approach for Electrical and Physical Design Integration of High-Performance Analog Circuits
This paper presents a layout generation tool that aims to reduce the gap between electrical sizing and physical realization of high performance analog circuits. The procedural lay...
Mohamed Dessouky, Marie-Minerve Louërat
ITC
2000
IEEE
110views Hardware» more  ITC 2000»
15 years 10 months ago
Algorithm level re-computing with shifted operands-a register transfer level concurrent error detection technique
—This paper presents Algorithm-level REcomputing with Shifted Operands (ARESO), which is a new register transfer (RT) level time redundancy-based concurrent error detection (CED)...
Ramesh Karri, Kaijie Wu
ITC
2000
IEEE
124views Hardware» more  ITC 2000»
15 years 10 months ago
Wrapper design for embedded core test
A wrapper is a thin shell around the core, that provides the switching between functional, and core-internal and core-external test modes. Together with a test access mechanism (T...
Yervant Zorian, Erik Jan Marinissen, Maurice Lousb...
SBRN
2000
IEEE
15 years 10 months ago
Adaptation of Parameters of BP Algorithm Using Learning Automata
d Articles >> Table of Contents >> Abstract VI Brazilian Symposium on Neural Networks (SBRN'00) p. 24 Adaptation of Parameters of BP Algorithm Using Automata Hamid...
Hamid Beigy, Mohammad Reza Meybodi