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183
Voted
JMMA
2002
15 years 5 months ago
2002
Convex polygons in the plane can be defined explicitly as an ordered list of vertices, or given implicitly, for example by a list of linear constraints. The latter representation h...
142
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JSA
2010
15 years 4 months ago
2010
— Effective address calculation for load and store instructions needs to compete for ALU with other instructions and hence extra latencies might be incurred to data cache accesse...
144
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ISLPED
2005
ACM
15 years 11 months ago
2005
ACM
As transistors keep shrinking and on-chip data caches keep growing, static power dissipation due to leakage of caches takes an increasing fraction of total power in processors. Se...
142
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VISUALIZATION
2000
IEEE
15 years 10 months ago
2000
IEEE
Large area tiled displays are gaining popularity for use in collaborative immersive virtual environments and scientific visualization. While recent work has addressed the issues ...
143
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ISLPED
2000
ACM
15 years 10 months ago
2000
ACM
In this paper we present a completely on-chip voltage regulation technique which promises to adjust the degree of voltage regulation in a digital logic chip in the face of process...