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ISSS
2000
IEEE
91views Hardware» more  ISSS 2000»
15 years 9 months ago
Instruction-based System-level Power Evaluation of System-On-A-Chip Peripheral Cores
Various system-level core-based power evaluation approaches for core types like microprocessors, caches, main memories, and buses, have been proposed in the past. Approaches for o...
Tony Givargis, Frank Vahid, Jörg Henkel
ITC
2000
IEEE
101views Hardware» more  ITC 2000»
15 years 9 months ago
Which concurrent error detection scheme to choose ?
Concurrent error detection (CED) techniques (based on hardware duplication, parity codes, etc.) are widely used to enhance system dependability. All CED techniques introduce some ...
Subhasish Mitra, Edward J. McCluskey
124
Voted
IWPC
2000
IEEE
15 years 9 months ago
Evaluating the Accessor Classification Approach to Detect Abstract Data Types
ng the Accessor Classification Approach to Detect Abstract Data Types icle presents an approach to identify abstract data types (ADTs) in source code. For each structured type deļ...
Jean-Francois Girard, Martin Würthner
143
Voted
IWSSD
2000
IEEE
15 years 9 months ago
Design Guidance through the Controlled Application of Constraints
We seek to facilitate development of high quality software designs and architectures by using rigorous process definitions to guide application of the complex structure of relati...
Aaron G. Cass, Leon J. Osterweil
IWSSD
2000
IEEE
15 years 9 months ago
An Approach to Preserving Sufficient Correctness in Open Resource Coalitions
Most software that most people use most of the time needs only moderate assurance of fitness for its intended purpose. Unlike high-assurance software, where the severe consequence...
Orna Raz, Mary Shaw