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DATE
2002
IEEE
80views Hardware» more  DATE 2002»
15 years 9 months ago
Test Planning and Design Space Exploration in a Core-Based Environment
This paper proposes a comprehensive model for test planning in a core-based environment. The main contribution of this work is the use of several types of TAMs and the considerati...
Érika F. Cota, Luigi Carro, Marcelo Lubasze...
DATE
2002
IEEE
105views Hardware» more  DATE 2002»
15 years 9 months ago
Power-Manageable Scheduling Technique for Control Dominated High-Level Synthesis
Optimizing power consumption at high-level is a critical step towards power-efficient digital system designs. This paper addresses the power management problem by scheduling a giv...
Chunhong Chen, Majid Sarrafzadeh
DATE
2002
IEEE
120views Hardware» more  DATE 2002»
15 years 9 months ago
Wire Placement for Crosstalk Energy Minimization in Address Buses
We propose a novel approach to bus energy minimization that targets crosstalk effects. Unlike previous approaches, we try to reduce energy through capacitance optimization, by ad ...
Luca Macchiarulo, Enrico Macii, Massimo Poncino
DELTA
2002
IEEE
15 years 9 months ago
Minimization and Partitioning Method Reducing Input Sets
The article describes a new Boolean minimization and single-level partitioning method based on the BOOM minimization system [6]. The minimization is performed with respect to the ...
Jan Hlavicka, Petr Fiser
DELTA
2002
IEEE
15 years 9 months ago
Multi-Level Fault Simulation of Digital Systems on Decision Diagrams
A new method for hierarchical fault simulation based on multi-level Decision Diagrams (DD) is proposed. We suppose that a register transfer (RT) level information along with gate-...
Raimund Ubar, Jaan Raik, Eero Ivask, Marina Brik