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ISMVL
2002
IEEE
82views Hardware» more  ISMVL 2002»
15 years 9 months ago
Representations of Logic Functions Using QRMDDs
This paper considers quasi-reduced multi-valued decision diagrams with bits (QRMDD( )s) to represent twovalued logic functions. It shows relations between the numbers of nodes in ...
Shinobu Nagayama, Tsutomu Sasao, Yukihiro Iguchi, ...
ISORC
2002
IEEE
15 years 9 months ago
Practical Considerations in Making CORBA Services Fault-Tolerant
This paper examines the CORBA Naming, Event, Notification, Trading, Time and Security Services, with the objective of identifying the issues that must be addressed in order make ...
Priya Narasimhan
130
Voted
ITC
2002
IEEE
102views Hardware» more  ITC 2002»
15 years 9 months ago
Fault Grading FPGA Interconnect Test Configurations
Conventional fault simulation techniques for FPGAs are very complicated and time consuming. The other alternative, FPGA fault emulation technique, is incomplete, and can be used o...
Mehdi Baradaran Tahoori, Subhasish Mitra, Shahin T...
ITC
2002
IEEE
83views Hardware» more  ITC 2002»
15 years 9 months ago
Packet-Based Input Test Data Compression Techniques
1 This paper presents a test input data compression technique, which can be used to reduce input test data volume, test time, and the number of required tester channels. The techni...
Erik H. Volkerink, Ajay Khoche, Subhasish Mitra
RTSS
2002
IEEE
15 years 9 months ago
Dynamic Scan Scheduling
We present an approach to computing cyclic schedules online and in real time, while attempting to maximize a quality-of-service metric. The motivation is the detection of RF emitt...
Bruno Dutertre