3864 search results - page 51 / 773 » time 2005 |
ASYNC
2005
IEEE
15 years 3 months ago
2005
IEEE
This paper proposes applying a logic synthesis approach to high level synthesis from SpecC specifications to timed asynchronous gate-level circuits. The state-based logic synthes...
108
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RSP
2005
IEEE
15 years 3 months ago
2005
IEEE
Embedded signal processing systems are usually associated with real-time constraints and/or high data rates so that fully software implementation are often not satisfactory. In th...
102
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ICDCIT
2005
Springer
15 years 3 months ago
2005
Springer
Abstract. Statically estimating the worst case execution time of a program is important for real-time embedded software. This is difficult even in the programming language level du...
GLVLSI
2005
IEEE
15 years 3 months ago
2005
IEEE
As timing requirements in today’s advanced VLSI designs become more aggressive, the need for automated tools to diagnose timing failures increases. This work presents two such a...
ATAL
2005
Springer
15 years 3 months ago
2005
Springer
We present TECTLK, a logic to specify knowledge and real time in multi-agent systems. We show that the model checking problem is decidable, and we present an algorithm for TECTLK ...