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TVLSI
1998
135views more  TVLSI 1998»
14 years 9 months ago
Wave-pipelining: a tutorial and research survey
— Wave-pipelining is a method of high-performance circuit design which implements pipelining in logic without the use of intermediate latches or registers. The combination of hig...
Wayne P. Burleson, Maciej J. Ciesielski, Fabian Kl...
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TVLSI
1998
89views more  TVLSI 1998»
14 years 9 months ago
Robust RTL power macromodels
—In this paper, we propose a robust register-transfer level (RTL) power modeling methodology for functional units. Our models are consistently accurate over a wide range of input...
Alessandro Bogliolo, Luca Benini
TVLSI
2002
107views more  TVLSI 2002»
14 years 9 months ago
Low-power clock distribution using multiple voltages and reduced swings
: Clock networks account for a significant fraction of the power dissipation of a chip and are critical to performance. This paper presents theory and algorithms for building a low...
Jatuchai Pangjun, Sachin S. Sapatnekar
TVLSI
2002
82views more  TVLSI 2002»
14 years 9 months ago
Probability-based approach to rectilinear Steiner tree problems
Abstract--The rectilinear Steiner tree (RST) problem is of essential importance to the automatic interconnect optimization for VLSI design. In this paper, we present a class of pro...
Chunhong Chen, Jiang Zhao, Majid Ahmadi
TVLSI
2002
134views more  TVLSI 2002»
14 years 9 months ago
Theoretical analysis of bus-invert coding
Theoretical analysis of bus-invert coding for reducing switching activity was previously investigated. In this paper we conduct a theoretical analysis of this method for coupling r...
Rung-Bin Lin, Chi-Ming Tsai