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98
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VLSI
2007
Springer
15 years 6 months ago
A low-power deblocking filter architecture for H.264 advanced video coding
Abstract— In this paper, a low-power deblocking filter architecture for H.264/AVC is proposed. A hybrid filtering order has been adopted to boost the speed of the deblocking ...
Jaemoon Kim, Sangkwon Na, Chong-Min Kyung
100
Voted
VLSI
2007
Springer
15 years 6 months ago
An efficient heterogeneous reconfigurable functional unit for an adaptive dynamic extensible processor
Replacing functional units of an extensible processor with reconfigurable functional units enhances performance and flexibility of processors to execute custom instructions. That ...
Arash Mehdizadeh, Behnam Ghavami, Morteza Saheb Za...
96
Voted
VLSI
2007
Springer
15 years 6 months ago
Use of gray decoding for implementation of symmetric functions
— This paper discusses reduction of the number of product terms in representation of totally symmetric Boolean functions by Sum of Products (SOP) and Fixed Polarity ReedMuller (F...
Osnat Keren, Ilya Levin, Radomir S. Stankovic
VLSI
2007
Springer
15 years 6 months ago
An efficient H.264 intra frame coder system design
In this paper, we present an efficient H.264 / MPEG4 Part 10 Intra Frame Coder System. The system achieves real-time performance for portable applications with low hardware cost, ...
Ilker Hamzaoglu, Ozgur Tasdizen, Esra Sahin
VLSI
2007
Springer
15 years 6 months ago
Incremental placement for structured ASICs using the transportation problem
— While physically driven synthesis techniques have proven to be an effective method to meet tight timing constraints required by a design, the incremental placement step during ...
Andrew C. Ling, Deshanand P. Singh, Stephen Dean B...