289 search results - page 29 / 58 » vlsi 2007 |
92
Voted
GLVLSI
2007
IEEE
15 years 6 months ago
2007
IEEE
Regularly structured design techniques can combat complexity on a variety of fronts. We present the Structured and Tuned Array Generation (STAG) design methodology, which provides...
118
Voted
APIN
2002
15 years 8 days ago
2002
This paper describes a new learning by example mechanism and its application for digital circuit design automation. This mechanism uses finite state machines to represent the infer...
101
click to vote
GLVLSI
2007
IEEE
15 years 6 months ago
2007
IEEE
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
ISVLSI
2007
IEEE
15 years 6 months ago
2007
IEEE
— Chemical-Mechanical Polishing (CMP) is one of the key steps during nanometer VLSI manufacturing process where minimum variation of layout pattern densities is desired. This pap...
104
click to vote
VLSID
2007
IEEE
16 years 24 days ago
2007
IEEE
Today, VLSI systems for computationally demanding applications are being built as Systems-on-Chip (SoCs) with a distributed memory sub-system which is shared by a large number of ...