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ISVLSI
2007
IEEE
15 years 6 months ago
2007
IEEE
In sub-90nm technologies, more frequent hard faults pose a serious burden on processor design and yield control. In addition to manufacturing-time chip repair schemes, microarchit...
ISVLSI
2007
IEEE
15 years 6 months ago
2007
IEEE
The new design challenges imposed by the increasing difficulties of today’s electronic systems obligated designers to develop new methodologies. System-level design and Platfor...
104
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ISVLSI
2007
IEEE
15 years 6 months ago
2007
IEEE
Abstract— Time-to-Market plays a central role on System-ona-Chip (SoC) competitiveness and the quality of the final product is a matter of concern as well. As SoCs complexity in...
107
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VLSID
2007
IEEE
16 years 25 days ago
2007
IEEE
We present minimization methodologies and an algorithm for simultaneous scheduling, binding, and allocation for the reduction of total power and power fluctuation during behaviora...
96
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VLSID
2007
IEEE
16 years 25 days ago
2007
IEEE
Device scaling such as reduced oxide thickness and high electric field has given rise to various reliability concerns. One such growing issue of concern is the degradation of PMOS...