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VLSID
1996
IEEE
130views VLSI» more  VLSID 1996»
13 years 10 months ago
A systolic architecture for LMS adaptive filtering with minimal adaptation delay
Existing systolic architectures for the LMS algorithm with delayed coeficient adaptation have large adaptation delay and hence degraded convergence behaviour. This paper presents ...
S. Ramanathan, V. Visvanathan
VLSID
1996
IEEE
153views VLSI» more  VLSID 1996»
13 years 10 months ago
Design of high performance two stage CMOS cascode op-amps with stable biasing
The technique of mirror biasing is introduced and applied to a very high gain two stage CMOS cascode op-amp, in order to desensitize its output voltage to bias variations. Various...
Pradip Mandal, V. Visvanathan
VLSID
1996
IEEE
133views VLSI» more  VLSID 1996»
13 years 10 months ago
Allocation and Binding in Data Path Synthesis Using a Genetic Algorithm Approach
A technique for allocatzon and binding for data path synthesis (DPS) using a Genetic Algorithm (GA) approach has been developed. The proposed genetic algorithm uses a non-conventi...
Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy G...
VLSID
1996
IEEE
106views VLSI» more  VLSID 1996»
13 years 10 months ago
VLSI/WSI Designs for Folded Cube-Connected Cycles Architectures
This paper presents VLSI/WSI designs for a recently introduced parallel architecture known as the folded cube-connected cycles (FCCC). We first discuss two layouts for the FCCC, i...
M. P. Sebastian, P. S. Nagendra Rao, Lawrence Jenk...