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VLSID
1999
IEEE
100views VLSI» more  VLSID 1999»
13 years 10 months ago
Improved Effective Capacitance Computations for Use in Logic and Layout Optimization
We describe an improved iterationless approach for computing the effective capacitance of an interconnect load at a driving gate output. The speed and accuracy of our approach mak...
Andrew B. Kahng, Sudhakar Muddu
VLSID
1999
IEEE
64views VLSI» more  VLSID 1999»
13 years 10 months ago
Exact Output Response Computation of RC Interconnects under Polynomial Input Waveforms
Accurate output response computation of RC interconnects under various input excitations is a key issue in deep submicron delay analysis.In this paper,we present an exact analysis...
Satrajit Gupta, Lalit M. Patnaik
VLSID
1999
IEEE
102views VLSI» more  VLSID 1999»
13 years 10 months ago
A Low-Power Wireless Camera System
This paper describes the system design of a lowpower wireless camera. A system level approach is used to reduce energy dissipation and maximize battery lifetime. System properties...
Anantha Chandrakasan, Abram P. Dancy, James Goodma...
VLSID
1999
IEEE
97views VLSI» more  VLSID 1999»
13 years 10 months ago
A New Methodology for Concurrent Technology Development and Cell Library Optimization
To minimize the time to market and cost of new sub 0.25um process technologies and products, PDF Solutions, Inc., has developed a new comprehensive approach based on the use of pr...
Marko P. Chew, Sharad Saxena, Thomas F. Cobourn, P...
VLSID
1999
IEEE
122views VLSI» more  VLSID 1999»
13 years 10 months ago
Formal Verification of an ARM Processor
This paper presents a detailed description of the application of a formal verification methodology to an ARM processor. The processor, a hybrid between the ARM7 and the StrongARM ...
Vishnu A. Patankar, Alok Jain, Randal E. Bryant