Sciweavers

77 search results - page 10 / 16
» vlsid 2002
Sort
View
VLSID
2002
IEEE
136views VLSI» more  VLSID 2002»
15 years 10 months ago
Buffered Routing Tree Construction under Buffer Placement Blockages
Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are powerful means of improving the circuit speed and ...
Wei Chen, Massoud Pedram, Premal Buch
VLSID
2002
IEEE
131views VLSI» more  VLSID 2002»
15 years 10 months ago
Divide-and-Conquer IDDQ Testing for Core-Based System Chips
IDDQ testing has been used as a test technique to supplement voltage testing of CMOS chips. The idea behind IDDQ testing is to declare a chip as faulty if the steady-state current...
C. P. Ravikumar, Rahul Kumar
82
Voted
VLSID
2002
IEEE
122views VLSI» more  VLSID 2002»
15 years 10 months ago
IEEE 1394a_2000 Physical Layer ASIC
CN4011A is IEEE 1394a_2000 standard Compliant Physical Layer ASIC. It is a 0.18um mixed-signal ASIC incorporating three analog ports, PLL, reference generator for analog along wit...
Ranjit Yashwante, Bhalchandra Jahagirdar
VLSID
2002
IEEE
192views VLSI» more  VLSID 2002»
15 years 3 months ago
Static and Dynamic Variable Voltage Scheduling Algorithms for Real-Time Heterogeneous Distributed Embedded Systems
à This paper addresses the problem of static and dynamic variable voltage scheduling of multi-rate periodic task graphs (i.e., tasks with precedence relationships) and aperiodic t...
Jiong Luo, Niraj K. Jha
VLSID
2002
IEEE
127views VLSI» more  VLSID 2002»
15 years 10 months ago
Switching Activity Estimation of Large Circuits using Multiple Bayesian Networks
Switching activity estimation is a crucial step in estimating dynamic power consumption in CMOS circuits. In [1], we proposed a new switching probability model based on Bayesian N...
Sanjukta Bhanja, N. Ranganathan