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VLSID
2002
IEEE
107views VLSI» more  VLSID 2002»
15 years 10 months ago
Automatic Model Refinement for Fast Architecture Exploration
We present a methodology and algorithms for automatic refinement from a given design specification to an architecture model based on decisions in architecture exploration. An arch...
Junyu Peng, Samar Abdi, Daniel Gajski
VLSID
2002
IEEE
83views VLSI» more  VLSID 2002»
15 years 10 months ago
Identifying Redundant Wire Replacements for Synthesis and Verification
We propose the redundancy identification of wire replacement faults. The solutions rely on the satisfiability (SAT) formulation of redundancy identification, augmented with the me...
Katarzyna Radecka, Zeljko Zilic
VLSID
2002
IEEE
127views VLSI» more  VLSID 2002»
15 years 10 months ago
Design of Asynchronous Controllers with Delay Insensitive Interface
Deep submicron technology calls for new design techniques, in which wire and gate delays are accounted to have equal or nearly equal effect on circuit behavior. Asynchronous speed...
Hiroshi Saito, Alex Kondratyev, Takashi Nanya
VLSID
2002
IEEE
116views VLSI» more  VLSID 2002»
15 years 10 months ago
A Design of Analog C-Matrix Circuits Used for Signal/Data Processing
Various calculation of matrices and vectors has been used in many digital signal processing systems. Although the calculation simply repeats multiplication and addition, the reite...
Takayuki Sugawara, Yoshikazu Miyanaga, Norinobu Yo...
VLSID
2002
IEEE
106views VLSI» more  VLSID 2002»
15 years 10 months ago
SWASAD: An ASIC Design for High Speed DNA Sequence Matching
This paper presents the Smith and Waterman Algorithm-Specific ASIC Design (SWASAD) project. This is a hardware solution that implements the S&W algorithm.. The SWASAD is an imp...
Tony Han, Sri Parameswaran