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VLSID
2002
IEEE
129views VLSI» more  VLSID 2002»
15 years 10 months ago
Efficient Generation of Delay Change Curves for Noise-Aware Static Timing Analysis
In this paper, we explore the concept of using analytical models to efficiently generate delay change curves (DCCs) that can then be used to characterize the impact of noise on an...
Kanak Agarwal, Yu Cao, Takashi Sato, Dennis Sylves...
VLSID
2002
IEEE
95views VLSI» more  VLSID 2002»
15 years 10 months ago
Design of an On-Chip Test Pattern Generator without Prohibited Pattern Set (PPS)
| This paper reports the design of a Test Pattern Generator (TPG) for VLSI circuits. The onchip TPG is so designed that it generates test patterns while avoiding generation of a gi...
Niloy Ganguly, Biplab K. Sikdar, Parimal Pal Chaud...
VLSID
2002
IEEE
97views VLSI» more  VLSID 2002»
15 years 10 months ago
Multiple Faults: Modeling, Simulation and Test
We give an algorithm to model any given multiple stuck-at fault as a single stuck-at fault. The procedure requires insertion of at most ? ? ? modeling gates, when the multiplicity...
Yong Chang Kim, Vishwani D. Agrawal, Kewal K. Salu...
VLSID
2002
IEEE
152views VLSI» more  VLSID 2002»
15 years 10 months ago
Verification of an Industrial CC-NUMA Server
Directed test program-based verification or formal verification methods are usually quite ineffective on large cachecoherent, non-uniform memory access (CC-NUMA) multiprocessors b...
Rajarshi Mukherjee, Yozo Nakayama, Toshiya Mima
VLSID
2002
IEEE
114views VLSI» more  VLSID 2002»
15 years 10 months ago
Embedded DRAM (eDRAM) Power-Energy Estimation for System-on-a-Chip (SoC) Applications
Embedded DRAM (eDRAM) power-energy estimation is presented for system-on-a-chip (SOC) applications. The main feature is the signal swing based analytic (SSBA) model, which improve...
Yong-Ha Park, Jeonghoon Kook, Hoi-Jun Yoo