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VLSID
2002
IEEE
15 years 10 months ago
2002
IEEE
Clock selection has a significant impact on the performance and quality of designs in high-level synthesis. In most synthesis systems, a convenient value of the clock is chosen or...
VLSID
2002
IEEE
15 years 10 months ago
2002
IEEE
| This paper reports the design of BIST structures for sequential machines. Testability of an FSM is limited due to the fact that some machine states remain unreachable and some ac...
VLSID
2002
IEEE
15 years 10 months ago
2002
IEEE
The development of application specific instruction set processors comprises several design phases: architecture exploration, software tools design, system verification and design...
VLSID
2002
IEEE
15 years 10 months ago
2002
IEEE
In this paper, we address the problem of power dissipation minimization in combinational circuits implemented using pass transistor logic (PTL). We transform the problem of power ...
VLSID
2002
IEEE
15 years 10 months ago
2002
IEEE
Abstract - The deep sub-micron regime has broughtup several manufacturing issues which impact circuit-performance and design. One such issue is flaring of transistors which causes ...