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VLSID
2004
IEEE
120views VLSI» more  VLSID 2004»
15 years 10 months ago
Dynamic Power Optimization of Interactive Systems
Abstract-- Power has become a major concern for mobile computing systems such as laptops and handhelds, on which a significant fraction of software usage is interactive instead of ...
Lin Zhong, Niraj K. Jha
VLSID
2004
IEEE
139views VLSI» more  VLSID 2004»
15 years 10 months ago
Open Defects Detection within 6T SRAM Cells using a No Write Recovery Test Mode
The detection of all open defects within 6T SRAM cells is always a challenge due to the significant test time requirements. This paper proposes a new design-for-test (DFT) techniq...
André Ivanov, Baosheng Wang, Josh Yang
VLSID
2004
IEEE
292views VLSI» more  VLSID 2004»
15 years 10 months ago
NoCGEN: A Template Based Reuse Methodology for Networks on Chip Architecture
In this paper, we describe NoCGEN, a Network On Chip (NoC) generator, which is used to create a simulatable and synthesizable NoC description. NoCGEN uses a set of modularised rou...
Jeremy Chan, Sri Parameswaran
VLSID
2004
IEEE
114views VLSI» more  VLSID 2004»
15 years 10 months ago
High-Speed Optoelectronics Receivers in SiGe
This paper focuses on the investigation of integrated CMOS and Silicon/Germanium (SiGe) devices for highspeed optical receiver circuits. In this paper, we present several competit...
Amit Gupta, Steven P. Levitan, Leo Selavo, Donald ...
VLSID
2004
IEEE
135views VLSI» more  VLSID 2004»
15 years 10 months ago
Integrating Self Testability with Design Space Exploration by a Controller based Estimation Technique
Recent research for testable designs has focussed on inserting test structures by re-arranging an Register-TransferLevel (RTL) data path generated from a behavioural description t...
M. S. Gaur, Mark Zwolinski