45 search results - page 8 / 9 » vlsid 2005 |
VLSID
2005
IEEE
14 years 6 months ago
2005
IEEE
Inter-wire coupling is a major source of power consumption and delay faults for on-chip buses implemented in UDSM SoC Systems. Elimination or minimization of such faults is crucia...
VLSID
2005
IEEE
14 years 6 months ago
2005
IEEE
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
VLSID
2005
IEEE
14 years 6 months ago
2005
IEEE
Abstract-- We present two-dimensional (space/time) compression techniques that reduce test data volume and test application time for scan testing of intellectual property (IP) core...
VLSID
2005
IEEE
14 years 6 months ago
2005
IEEE
Buffer insertion method plays a great role in modern VLSI design. Many buffer insertion algorithms have been proposed in recent years. However, most of them used simplified delay ...
VLSID
2005
IEEE
14 years 6 months ago
2005
IEEE
An accurate and efficient stacking effect macro-model for leakage power in sub-100nm circuits is presented in this paper. Leakage power, including subthreshold leakage power and ga...