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    VLSISP
    2008
    132views more  VLSISP 2008»
    Serial and Parallel FPGA-based Variable Block Size Motion Estimation Processors
    14 years 11 months ago
    Serial and Parallel FPGA-based Variable Block Size Motion Estimation Processors
    Download  www.cse.cuhk.edu.hk
    H.264/AVC is the latest video coding standard adopting variable block size motion estimation (VBS-ME), quarter-pixel accuracy, motion vector prediction and multi-reference frames f...
    Brian M. H. Li, Philip Heng Wai Leong
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    VLSISP
    2008
    93views more  VLSISP 2008»
    Performance and Energy Consumption Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path
    14 years 11 months ago
    Performance and Energy Consumption Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path
    Download  www.vlsi.ee.upatras.gr
    The speedups and the energy reductions achieved in a generic single-chip microprocessor system by employing a high-performance data-path are presented. The data-path acts as a copr...
    Michalis D. Galanis, Gregory Dimitroulakos, Costas...
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    VLSISP
    2008
    118views more  VLSISP 2008»
    Analysis of Lifting and B-Spline DWT Implementations for Implantable Neuroprosthetics
    14 years 11 months ago
    Analysis of Lifting and B-Spline DWT Implementations for Implantable Neuroprosthetics
    Download  www.egr.msu.edu
    Abstract. The large amount of data generated by neuroprosthetic devices requires a high communication bandwidth for extra-cranial transmission, critically limiting the number and u...
    Awais M. Kamboh, Andrew Mason, Karim G. Oweiss
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    VLSISP
    2008
    111views more  VLSISP 2008»
    Design Methodology for Throughput Optimum Architectures of Hash Algorithms of the MD4-class
    14 years 11 months ago
    Design Methodology for Throughput Optimum Architectures of Hash Algorithms of the MD4-class
    Download  www.cosic.esat.kuleuven.be
    Abstract. In this paper we propose an architecture design methodology to optimize the throughput of MD4-based hash algorithms. The proposed methodology includes an iteration bound ...
    Yong Ki Lee, Herwin Chan, Ingrid Verbauwhede
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    VLSISP
    1998
    128views more  VLSISP 1998»
    A Low Power DSP Engine for Wireless Communications
    14 years 11 months ago
    A Low Power DSP Engine for Wireless Communications
    Download  www.ee.ucla.edu
    This paper describes the architecture and the performance of a new programmable 16-bit Digital Signal Processor (DSP) engine. It is developed specifically for next generation wire...
    Ingrid Verbauwhede, Mihran Touriguian
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