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ISQED
2011
IEEE
398views Hardware» more  ISQED 2011»
14 years 8 months ago
Switching constraint-driven thermal and reliability analysis of Nanometer designs
As process technology continues to shrink, interconnect current densities continue to increase, making it ever more difficult to meet chip reliability targets. For microprocessors...
Srini Krishnamoorthy, Vishak Venkatraman, Yuri Apa...
149
Voted
ISQED
2011
IEEE
230views Hardware» more  ISQED 2011»
14 years 8 months ago
Constraint generation for software-based post-silicon bug masking with scalable resynthesis technique for constraint optimizatio
Due to the dramatic increase in design complexity, verifying the functional correctness of a circuit is becoming more difficult. Therefore, bugs may escape all verification effo...
Chia-Wei Chang, Hong-Zu Chou, Kai-Hui Chang, Jie-H...
ISQED
2011
IEEE
329views Hardware» more  ISQED 2011»
14 years 8 months ago
New category of ultra-thin notchless 6T SRAM cell layout topologies for sub-22nm
The extent to which the 6T SRAM bit cell can be perpetuated through continued scaling is of enormous technological and economic importance. Understanding the growing limitations i...
Randy W. Mann, Benton H. Calhoun
147
Voted
ISQED
2011
IEEE
309views Hardware» more  ISQED 2011»
14 years 8 months ago
Modeling and analyzing NBTI in the presence of Process Variation
With continuous scaling of transistors in each technology generation, NBTI and Process Variation (PV) have become very important silicon reliability problems for the microprocesso...
Taniya Siddiqua, Sudhanva Gurumurthi, Mircea R. St...
ISPW
2011
IEEE
14 years 8 months ago
Analyzing software process models with AVISPA
Software process models are sophisticated and large specifications aimed at organizing and managing software development. Their formal specification demands an enormous effort,...
Julio Ariel Hurtado Alegria, María Cecilia ...
ISORC
2011
IEEE
14 years 8 months ago
A Time-Predictable Object Cache
—Static cache analysis for data allocated on the heap is practically impossible for standard data caches. We propose a distinct object cache for heap allocated data. The cache is...
Martin Schoeberl
ISCAS
2011
IEEE
316views Hardware» more  ISCAS 2011»
14 years 8 months ago
A high linear low flicker noise 25% duty cycle LO I/Q mixer for a FM radio receiver
Jae-Seung Lee, Chang-Jin Jeong, Yeong-Shin Jang, I...
167
Voted
ISCAS
2011
IEEE
261views Hardware» more  ISCAS 2011»
14 years 8 months ago
Optimization of area in digit-serial Multiple Constant Multiplications at gate-level
— The last two decades have seen many efficient algorithms and architectures for the design of low-complexity bit-parallel Multiple Constant Multiplications (MCM) operation, tha...
Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Pa...
154
Voted
ISCAS
2011
IEEE
278views Hardware» more  ISCAS 2011»
14 years 8 months ago
A programmable axonal propagation delay circuit for time-delay spiking neural networks
— we present an implementation of a programmable axonal propagation delay circuit which uses one first-order logdomain low-pass filter. Delays may be programmed in the 550ms rang...
Runchun Wang, Craig T. Jin, Alistair McEwan, Andr&...
ISCAS
2011
IEEE
217views Hardware» more  ISCAS 2011»
14 years 8 months ago
A 6.25 MHz BW 8-OSR fifth-order single-stage sigma-delta ADC
— A switched-capacitor single-stage sigma-delta ADC with a fifth-order modulator is proposed. The proposed sigmadelta ADC employs feed-forward architecture with oversampling rati...
Chang-Seob Shin, Min-Ho Yoon, Kang-Il Cho, Young-J...