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108
Voted
FPGA
2003
ACM
154views FPGA» more  FPGA 2003»
15 years 10 months ago
Parallel placement for field-programmable gate arrays
Placement and routing are the most time-consuming processes in automatically synthesizing and configuring circuits for field-programmable gate arrays (FPGAs). In this paper, we ...
Pak K. Chan, Martine D. F. Schlag
184
Voted
GLVLSI
2009
IEEE
189views VLSI» more  GLVLSI 2009»
15 years 11 months ago
High-performance, cost-effective heterogeneous 3D FPGA architectures
In this paper, we propose novel architectural and design techniques for three-dimensional field-programmable gate arrays (3D FPGAs) with Through-Silicon Vias (TSVs). We develop a...
Roto Le, Sherief Reda, R. Iris Bahar