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109
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ASYNC
1998
IEEE
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ASYNC 1998
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An Implicit Method for Hazard-Free Two-Level Logic Minimization
15 years 7 months ago
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None of the available minimizers for exact 2-level hazard-free logic minimization can synthesize very large circuits. This limitation has forced researchers to resort to heuristic...
Michael Theobald, Steven M. Nowick
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