61
Voted
ISLPED
1999
ACM
15 years 5 months ago
1999
ACM
ISLPED
1999
ACM
15 years 5 months ago
1999
ACM
In this paper, we propose a technique that uses an additional mini cache, the L0-Cache, located between the instruction cache I-Cache and the CPU core. This mechanism can provid...
78
Voted
ISLPED
1999
ACM
15 years 5 months ago
1999
ACM
60
Voted
ISLPED
1999
ACM
15 years 5 months ago
1999
ACM
The charge recovery databus is a scheme which reduces energy consumption through the application of adiabatic circuit techniques. Previous work 2 gives a solid theoretical analysi...
106
Voted
DATE
1999
IEEE
15 years 5 months ago
1999
IEEE
Commonly used scheduling algorithms in high-level synthesis only accept one process at a time and are not capable of sharing resources across process boundaries. This results in t...
93
Voted
DATE
1999
IEEE
15 years 5 months ago
1999
IEEE
We propose a conceptual framework, called the Rugby Model, in which designs, design processes and design tools can be studied. It is an extension of the Y chart and adds two dimen...
70
Voted
ISLPED
1999
ACM
15 years 5 months ago
1999
ACM
ISLPED
1999
ACM
15 years 5 months ago
1999
ACM
We propose a technique for reducing the energy required by rmware code to execute on embedded systems. The method is based on the idea of compressing the most commonly executed in...
61
Voted
DATE
1999
IEEE
15 years 5 months ago
1999
IEEE
105
click to vote
ISLPED
1999
ACM
15 years 5 months ago
1999
ACM
A recent trend in low power design has been the employment of reduced precision processing methods for decreasing arithmetic activity and average power dissipation. Such designs c...