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    DAC
    1997
    ACM
    160views Computer Architecture» more  DAC 1997»
    Data Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets
    15 years 7 months ago
    Data Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets
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    The paper presents an algorithm to determine the close-tosmallest possible data buffer sizes for arbitrary synchronous data flow (SDF) applications, such that we can guarantee the...
    Marleen Adé, Rudy Lauwereins, J. A. Peperst...
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