ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
- This paper proposes a hardware design debugging method, Transition and Transaction Tracer (TTT), which probes and records the signals of interest for a long time, hours, days, or...
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
- We propose a framework to unify the process of false paths and multi-cycle paths in static timing analysis (STA). We use subgraphs attached with timing constraints to represent f...
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
Due to false paths and multi-cycle paths in a circuit, using only topological delay to determine the clock period could be too conservative. In this paper, we address the timing a...
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
A novel algorithm for object tracking in video pictures, based on image segmentation and pattern matching, as well as its FPGA/ASIC implementation architecture are presented. With ...
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
The verification of modern computing systems has grown to dominate the cost of system design, often with limited success as designs continue to be released with latent bugs. This t...
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
Abstract-- This paper presents a fundamental result on buffer sizing. Given an interconnection wire with n buffers evenly spaced along the wire, we would like to size all buffers s...
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
Abstract-- In this paper, we present FastPlace 2.0
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
- In this paper, we study the relationship between C4 package resonance effects and logical switching timing correlations, which has not been thoroughly investigated in the past. W...
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
- This paper presents a new test and characterization scheme for 10+ GHz low jitter wide band PLL in 90 nm partially depleted (PD) Silicon-On-Insulator (SOI) CMOS technology. We me...