153
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FPL
2008
Springer
15 years 6 months ago
2008
Springer
A high-speed and secure dynamic partial reconfiguration (DPR) system is realized with AES-GCM that guarantees both confidentiality and authenticity of FPGA bitstreams. In DPR syst...
126
Voted
MADNES
2005
Springer
15 years 10 months ago
2005
Springer
Abstract. This paper contains the summary of a panel on authentication in constrained environments held during the Secure MADNES’05 Workshop. These were transcribed from hand-wri...
140
Voted
CHES
2009
Springer
16 years 5 months ago
2009
Springer
We present a bitsliced implementation of AES encryption in counter mode for 64-bit Intel processors. Running at 7.59 cycles/byte on a Core 2, it is up to 25% faster than previous i...