105
Voted
ASPDAC
2010
ACM
15 years 5 days ago
2010
ACM
Level-sensitive transparent latches are widely used in high-performance sequential circuit designs. Under process variations, the timing of a transparently latched circuit will ada...
TVLSI
2008
15 years 2 months ago
2008
With aggressive scaling down of feature sizes in VLSI fabrication, process variation has become a critical issue in designs. We show that two necessary conditions for the "Max...
83
Voted
DAC
2004
ACM
16 years 3 months ago
2004
ACM