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131
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ISVLSI
2007
IEEE
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ISVLSI 2007
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Performance of Graceful Degradation for Cache Faults
15 years 9 months ago
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www.cs.pitt.edu
In sub-90nm technologies, more frequent hard faults pose a serious burden on processor design and yield control. In addition to manufacturing-time chip repair schemes, microarchit...
Hyunjin Lee, Sangyeun Cho, Bruce R. Childers
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